The present invention relates to glitch filters, and, more particularly, to digital glitch filters for filtering glitches in signals.
A glitch is a sporadic and unintended switching of an input signal level to a high or a low state, followed by a return to the initial state. The transition lasts for a short duration. Glitches may be classified into positive and negative glitches. An abrupt rise in the signal level from the desired normal level is known as a positive glitch and an abrupt fall in the signal level from the desired normal level is known as a negative glitch. Glitches occur due to fault or design error in an electronic circuit. For example, an erroneously designed digital circuit may result in a race condition in the digital components of the digital circuit, leading to the occurrence of glitches. Additionally, the presence of external interfering signals may also lead to glitches. The occurrence of glitches in a digital circuit may lead to malfunctioning of the electronic circuit and cause the circuit to generate a spurious output.
Digital glitch filters are commonly used to eliminate glitches in a digital signal. In one such digital glitch filtering system, clocked circuits, such as a pair of D-type flip-flops connected as shift registers, are used for filtering glitches. A digital signal prone to glitches and an externally generated clock signal with a frequency that is an integral multiple of the frequency of the digital signal is provided to the above system. The digital signal is sampled using the clock signal and divided into multiple sub-intervals. The pair of D flip-flops compare the digital signal levels of two consecutive sub-intervals. If the signal levels are identical, then the current magnitude information is transmitted to the filtered output stage, otherwise the previous signal level is maintained at the output stage. This approach, however, has certain drawbacks. Firstly, the system requires a high frequency clock generator that increases the cost of the circuit. Secondly, the system may occasionally pass a glitch that is sampled at the rising edge of the clock signal, thus making the system unreliable. Thirdly, the system may ignore the glitches in a wide pulse since glitches may not have been sampled by the rising edge of the clock.
Therefore, it would be advantageous to have a glitch filter circuit that is simple, cost-effective, and robust enough to overcome the above mentioned drawbacks.